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[RISCV] Define vle/vse intrinsics.
authorZakk Chen <zakk.chen@sifive.com>
Tue, 15 Dec 2020 14:53:16 +0000 (06:53 -0800)
committerZakk Chen <zakk.chen@sifive.com>
Thu, 17 Dec 2020 02:08:15 +0000 (18:08 -0800)
commitc1d6d461aa77921d7ce761e2966e6bc1f3eee2db
tree166648211b1b1b18033343113f6054cf9296864ctree | snapshot
parent50aaa8c274910d78d7bf6c929a34fe58b1f45579commit | diff
[RISCV] Define vle/vse intrinsics.

Define vle/vse intrinsics and lower to V instructions.

We work with @rogfer01 from BSC to come out this patch.

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>
Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D93359
llvm/include/llvm/IR/IntrinsicsRISCV.td diff | blob | history
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td diff | blob | history
llvm/test/CodeGen/RISCV/rvv/vle-rv32.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vle-rv64.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vse-rv32.ll [new file with mode: 0644] blob
llvm/test/CodeGen/RISCV/rvv/vse-rv64.ll [new file with mode: 0644] blob
Domain: System / Toolchain;