nvc0/ir: all short immediates are sign-extended, adjust LIMM test
authorIlia Mirkin <imirkin@alum.mit.edu>
Sat, 21 Apr 2018 17:08:51 +0000 (13:08 -0400)
committerIlia Mirkin <imirkin@alum.mit.edu>
Wed, 25 Apr 2018 01:37:44 +0000 (21:37 -0400)
commitc17ddcb4b4240542832fba72b5810039dd245fc9
tree8e075d14eaf5b647d739243a5f0230d238ef2c9b
parent6695f9d5c5c94df080efc720ed532217618a28c3
nvc0/ir: all short immediates are sign-extended, adjust LIMM test

Some analysis suggests that all short immediates are sign-extended. The
insnCanLoad logic already accounted for this, but we could still pick
the wrong form when emitting actual instructions that support both short
and long immediates (with the long form usually having additional
restrictions that insnCanLoad should be aware of).

This also reverses a bunch of commits that had previously "worked
around" this issue in various emitters:

9c63224540ef: gm107/ir: make use of ADD32I for all immediates
83a4f28dc27b: gm107/ir: make use of LOP32I for all immediates
b84c97587b4a: gm107/ir: make use of IMUL32I for all immediates
d30768025a22: gk110/ir: make use of IMUL32I for all immediates

as well as the original import for UMUL in the nvc0 emitter.

Reported-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tested-by: Karol Herbst <kherbst@redhat.com>
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp