drm/amd/display: use uclk pstate latency for fw assisted mclk validation dcn32
authorDillon Varone <Dillon.Varone@amd.com>
Thu, 3 Nov 2022 22:38:13 +0000 (18:38 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Nov 2022 18:22:20 +0000 (13:22 -0500)
commitc149947b188c651b943c1d8ca1494d1a98a3e27f
treedd88da31f1cf6e004b33ab98f49665c5722a9b51
parent246e667079e8d0fc85f842bceca8c5a3c5da5905
drm/amd/display: use uclk pstate latency for fw assisted mclk validation dcn32

[WHY?]
DCN32 uses fclk pstate watermarks for dummy pstate, and must always be
supported.

[HOW?]
Validation needs to be run with fclk pstate latency set
as the dummy pstate latency to get correct prefetch and bandwidth outputs.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c