MIPS: BMIPS: BMIPS5000 has I cache filing from D cache
authorFlorian Fainelli <f.fainelli@gmail.com>
Mon, 4 Apr 2016 17:55:34 +0000 (10:55 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 13 May 2016 12:02:06 +0000 (14:02 +0200)
commitc130d2fd3d59fbd5d269f7d5827bd4ed1d94aec6
tree71d712381550ab25f5209f464a7a6ab1f19182bd
parent0201bfb1af4747f3642fa7a707fd81bbf78390b7
MIPS: BMIPS: BMIPS5000 has I cache filing from D cache

BMIPS5000 and BMIPS52000 processors have their I-cache filling from the
D-cache. Since BMIPS_GENERIC does not provide (yet) a
cpu-feature-overrides.h file, this was not set anywhere, so make sure
the R4K cache detection takes care of that.

Fixes: d74b0172e4e2c ("MIPS: BMIPS: Add special cache handling in c-r4k.c")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13010/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/mm/c-r4k.c