RISC-V: Fix VSETVL PASS bug in exception handling
authorJu-Zhe Zhong <juzhe.zhong@rivai.ai>
Sat, 4 Feb 2023 01:09:30 +0000 (09:09 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Sun, 12 Feb 2023 02:58:04 +0000 (10:58 +0800)
commitc129d22de6bde38edcc3a53ed73c0cc5033bb83a
treeea09882105750fcf4e323a264fe9bddd3cd8947e
parentee1178878383ddd64e760f17338fe8a8384c31c8
RISC-V: Fix VSETVL PASS bug in exception handling

gcc/ChangeLog:

* config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.

gcc/testsuite/ChangeLog:

* g++.target/riscv/rvv/base/exception-1.C: New test.
gcc/config/riscv/riscv-vsetvl.cc
gcc/testsuite/g++.target/riscv/rvv/base/exception-1.C [new file with mode: 0644]