[RISCV] Add isel patterns to match sbset/sbclr/sbinv/sbext even if the shift amount...

[RISCV] Add isel patterns to match sbset/sbclr/sbinv/sbext even if the shift amount isn't masked.

This uses the shiftop PatFrags to handle the masked shift amount
and unmasked shift amount cases. That also checks XLen as part
of the masked amount check so we don't need separate RV32 and RV64
patterns.

Differential Revision: https://reviews.llvm.org/D91016