anv, iris: Disable pre fetching the binding table entries on DG2
authorRohan Garg <rohan.garg@intel.com>
Tue, 6 Sep 2022 15:31:51 +0000 (17:31 +0200)
committerRohan Garg <rohan.garg@intel.com>
Tue, 11 Oct 2022 13:16:09 +0000 (15:16 +0200)
commitc0c243f1cb4e9ad7b7e1e3ab1d763494d8936c09
tree2efad8abf07cca63853a70c682b89fa87f3f00e8
parentd91c3bde8c85399e1ab5dbfd5b0e8bfbf53d572f
anv, iris: Disable pre fetching the binding table entries on DG2

On DG2 the HW will fetch the binding entries into the cache
for every single thread when a compute walker is dispatched,
wiping out the advantages of the cache prefetch.

The spec also advises to not do a cache prefetch when we have more than
31 binding table entries, but most real world applications will never
hit that limit.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18498>
src/gallium/drivers/iris/iris_state.c
src/intel/vulkan/genX_cmd_buffer.c
src/intel/vulkan/genX_pipeline.c