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(parent: 82e9c66) | patch
RISC-V: hwprobe: Expose Zba, Zbb, and Zbs
authorEvan Green <evan@rivosinc.com>
Tue, 9 May 2023 18:25:03 +0000 (11:25 -0700)
committerPalmer Dabbelt <palmer@rivosinc.com>
Mon, 19 Jun 2023 16:53:10 +0000 (09:53 -0700)
commitc0baf321038d5fa4273c0dc495d78f39848dd8fc
tree27ac91fb3521ca72078e3d0d5b908772dd0ebd29tree | snapshot
parent82e9c66e81c814e20ee2a3aafb60a9012c79fb40commit | diff
RISC-V: hwprobe: Expose Zba, Zbb, and Zbs

Add two new bits to the IMA_EXT_0 key for ZBA, ZBB, and ZBS extensions.
These are accurately reported per CPU.

Signed-off-by: Evan Green <evan@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Link: https://lore.kernel.org/r/20230509182504.2997252-4-evan@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/riscv/hwprobe.rst diff | blob | history
arch/riscv/include/uapi/asm/hwprobe.h diff | blob | history
arch/riscv/kernel/sys_riscv.c diff | blob | history
Domain: System / Kernel;