AMDGPU/GlobalISel: Use more wide vector load/stores
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 21 Jan 2020 17:20:02 +0000 (12:20 -0500)
committerMatt Arsenault <arsenm2@gmail.com>
Sat, 1 Feb 2020 15:47:21 +0000 (10:47 -0500)
commitc0b12916a7e81ed5018cd94606d1d99dc759704e
tree0395c3c3d5374f34e000068840b19ba5d67980f4
parente3117e5c30605d35d1c144cacbe6adb45ffe2fe8
AMDGPU/GlobalISel: Use more wide vector load/stores

This improves the type breakdown for some large vectors. For example,
we now get a <4 x s32> and s32 store instead of 5 s32 stores for
<5 x s32>.
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir