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(parent: c54a0d0) | patch
Sparc: Prefer reg+reg address encoding when only one register used.
authorJames Y Knight <jyknight@google.com>
Wed, 29 Apr 2015 14:54:44 +0000 (14:54 +0000)
committerJames Y Knight <jyknight@google.com>
Wed, 29 Apr 2015 14:54:44 +0000 (14:54 +0000)
commitc09bdfa4cbfdf17989be8da18044ec8e65bd8f54
tree88fe2612cf6f833d973f055fc42c5e8b795d557ctree | snapshot
parentc54a0d0bf444d159262771df250cd90a399bd9f6commit | diff
Sparc: Prefer reg+reg address encoding when only one register used.

Reg+%g0 is preferred to Reg+imm0 by the manual, and is what GCC produces.

Futhermore, reg+imm is invalid for the (not yet supported) "alternate
address space" instructions.

Differential Revision: http://reviews.llvm.org/D8753

llvm-svn: 236107
llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp diff | blob | history
llvm/test/MC/Disassembler/Sparc/sparc-mem.txt diff | blob | history
llvm/test/MC/Sparc/sparc-ctrl-instructions.s diff | blob | history
llvm/test/MC/Sparc/sparc-mem-instructions.s diff | blob | history
Domain: System / Toolchain;