phy: qcom-qmp-pcie: fix the regs layout table for sm8450 gen3x1 PHY
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fri, 13 Jan 2023 21:21:37 +0000 (23:21 +0200)
committerVinod Koul <vkoul@kernel.org>
Wed, 18 Jan 2023 17:24:49 +0000 (22:54 +0530)
commitc08436c1569e54f712013f3b2fbc3ef3f739a7b1
tree8d38fb8f6769be04b6eed6d90128864cf8d63f77
parentaa14cff16b9d09166c6e1261231a2a1c561adea1
phy: qcom-qmp-pcie: fix the regs layout table for sm8450 gen3x1 PHY

The sm8450 gen3x1 PHY references the pciephy_v4_regs_layout while the
PHY itself uses v5 regs. While there are only minor differences between
v4 and v5 regs and none of them concerns registers mentions in
regs_layout, switch the PHY to use pciephy_v5_regs_layout to remove
possible confusion.

Fixes: bbe207a1aba1 ("phy: qcom-qmp-pcie: rename regs layout arrays")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230113212138.421583-1-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c