drm/amd/display: fine tune logic of edid max TMDS clock check
authorDale Zhao <dale.zhao@amd.com>
Fri, 5 Jun 2020 09:55:18 +0000 (17:55 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 1 Jul 2020 05:59:25 +0000 (01:59 -0400)
commitc04bd16e481663aade0150daf7a91cb87831bb83
treee6c587e58593787e120001992c749354406f26ca
parent3e1974cf02481c464703a33881e20c9711053979
drm/amd/display: fine tune logic of edid max TMDS clock check

[WHY]
Check max_tmds_clk_mhz firstly will restrict pixel clock under HDMI
1.4, thus HDMI2.0 port can't correctly support 4K 60Hz.

[HOW]
Fine tune the logic to check max_forum_tmds_clk_mhz firstly.

Signed-off-by: Dale Zhao <dale.zhao@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dc_types.h
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c