projects / platform / upstream / dotnet / runtime.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 8ef3991) | patch
RyuJIT/x86: handle must-init multi-reg vars
authorCarol Eidt <carol.eidt@microsoft.com>
Wed, 19 Oct 2016 18:28:22 +0000 (11:28 -0700)
committerCarol Eidt <carol.eidt@microsoft.com>
Wed, 19 Oct 2016 18:28:22 +0000 (11:28 -0700)
commitc01ca0e447666a5e21026eb06f838da037722238
tree0fa3ea26ad483b0c2df2346e0b4cd2b4d5bc0f1etree | snapshot
parent8ef399137e9b992d20ec9834e7f2ffff02a9ec53commit | diff
RyuJIT/x86: handle must-init multi-reg vars

In the RyuJIT backend, lclVars can occupy multiple registers, and not have a stack location. These should be handled for must-init as for lvRegister. The existing code was doing this oinly for _TARGET_64_BIT_ when it should be !LEGACY_BACKEND.
This fixes DevDiv VSO bug 278372

Commit migrated from https://github.com/dotnet/coreclr/commit/9ed511b7d60853fb32938d9cab252fbfeafce85e
src/coreclr/src/jit/codegencommon.cpp diff | blob | history
src/coreclr/tests/src/JIT/Regression/JitBlue/DevDiv_278372/DevDiv_278372.il [new file with mode: 0644] blob
src/coreclr/tests/src/JIT/Regression/JitBlue/DevDiv_278372/DevDiv_278372.ilproj [new file with mode: 0644] blob
Domain: Dotnet / Core;