clk: rockchip: rk3328: Handle usb480m phy clock
authorJagan Teki <jagan@amarulasolutions.com>
Tue, 6 Jun 2023 17:09:17 +0000 (22:39 +0530)
committerKever Yang <kever.yang@rock-chips.com>
Mon, 31 Jul 2023 12:33:18 +0000 (20:33 +0800)
commitc0165258582078c206faca352b0f63ccdf535ce7
treef70c57a5b5a412631159c8f19d4a19cbacd2bbdd
parent9aa93d84038bb47bcd4e9ac4287ef63e1b022971
clk: rockchip: rk3328: Handle usb480m phy clock

Handle USB480M clock ID in set_rate() and set_parent()
to allow the dt assigned-clocks and assigned-clock-parents
work on rk3328.dtsi

Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
drivers/clk/rockchip/clk_rk3328.c