Implement SSE2 Store* intrinsics
authorFei Peng <fei.peng@intel.com>
Tue, 6 Feb 2018 07:15:12 +0000 (23:15 -0800)
committerFei Peng <fei.peng@intel.com>
Tue, 6 Feb 2018 07:15:12 +0000 (23:15 -0800)
commitbffd8cc4d990e8559605a34d08d99a257acb074e
tree58ab9865ba65ea4b3fb58dfcbe16989975d0a309
parent89852773751f55a3d017657e1205d4797ba56ab7
Implement SSE2 Store* intrinsics
20 files changed:
src/jit/hwintrinsiclistxarch.h
src/jit/instrsxarch.h
tests/src/JIT/HardwareIntrinsics/X86/Sse2/Store.cs [new file with mode: 0644]
tests/src/JIT/HardwareIntrinsics/X86/Sse2/StoreAligned.cs [new file with mode: 0644]
tests/src/JIT/HardwareIntrinsics/X86/Sse2/StoreAlignedNonTemporal.cs [new file with mode: 0644]
tests/src/JIT/HardwareIntrinsics/X86/Sse2/StoreAlignedNonTemporal_r.csproj [new file with mode: 0644]
tests/src/JIT/HardwareIntrinsics/X86/Sse2/StoreAlignedNonTemporal_ro.csproj [new file with mode: 0644]
tests/src/JIT/HardwareIntrinsics/X86/Sse2/StoreAligned_r.csproj [new file with mode: 0644]
tests/src/JIT/HardwareIntrinsics/X86/Sse2/StoreAligned_ro.csproj [new file with mode: 0644]
tests/src/JIT/HardwareIntrinsics/X86/Sse2/StoreHigh.cs [new file with mode: 0644]
tests/src/JIT/HardwareIntrinsics/X86/Sse2/StoreHigh_r.csproj [new file with mode: 0644]
tests/src/JIT/HardwareIntrinsics/X86/Sse2/StoreHigh_ro.csproj [new file with mode: 0644]
tests/src/JIT/HardwareIntrinsics/X86/Sse2/StoreLow.cs [new file with mode: 0644]
tests/src/JIT/HardwareIntrinsics/X86/Sse2/StoreLow_r.csproj [new file with mode: 0644]
tests/src/JIT/HardwareIntrinsics/X86/Sse2/StoreLow_ro.csproj [new file with mode: 0644]
tests/src/JIT/HardwareIntrinsics/X86/Sse2/StoreScalar.cs [new file with mode: 0644]
tests/src/JIT/HardwareIntrinsics/X86/Sse2/StoreScalar_r.csproj [new file with mode: 0644]
tests/src/JIT/HardwareIntrinsics/X86/Sse2/StoreScalar_ro.csproj [new file with mode: 0644]
tests/src/JIT/HardwareIntrinsics/X86/Sse2/Store_r.csproj [new file with mode: 0644]
tests/src/JIT/HardwareIntrinsics/X86/Sse2/Store_ro.csproj [new file with mode: 0644]