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ARM: dts: exynos5420: add input clocks to audss clock controller
authorAndrew Bresticker <abrestic@chromium.org>
Wed, 25 Sep 2013 21:12:52 +0000 (14:12 -0700)
committerHyungwon Hwang <human.hwang@samsung.com>
Wed, 17 Dec 2014 07:18:08 +0000 (16:18 +0900)
commitbff2f2fb62aa5be7203bd7747a21b3fd6f7a6610
tree4598c4389917bd878c2123e420b6fef00c03bca2tree | snapshot
parentca7ec536f091fd148945f8eebf045f2a0e4d01b4commit | diff
ARM: dts: exynos5420: add input clocks to audss clock controller

Specify the remaining input clocks (pll_ref, pll_in, and sclk_pcm_in)
for the AudioSS clock controller.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
arch/arm/boot/dts/exynos5420.dtsi diff | blob | history
Domain: System / Kernel;