[AMDGPU] Add GFX11 llvm.amdgcn.permlane64 intrinsic
authorJay Foad <jay.foad@amd.com>
Mon, 13 Jun 2022 15:35:44 +0000 (16:35 +0100)
committerJay Foad <jay.foad@amd.com>
Mon, 13 Jun 2022 20:12:11 +0000 (21:12 +0100)
commitbfcfd53b9244874b9807409a01407fd9e1d5d3e3
tree080d7360a13416999bd8fe9804189c8b06e9f2ba
parentbe232979bccee6e0257bce246f0126ef26460f48
[AMDGPU] Add GFX11 llvm.amdgcn.permlane64 intrinsic

Compared to permlane16, permlane64 has no BC input because it has no
boundary conditions, no fi input because the instruction acts as if FI
were always enabled, and no OLD input because it always writes to every
active lane.

Also use the new intrinsic in the atomic optimizer pass.

Differential Revision: https://reviews.llvm.org/D127662
llvm/include/llvm/IR/IntrinsicsAMDGPU.td
llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
llvm/lib/Target/AMDGPU/VOP1Instructions.td
llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll [new file with mode: 0644]
llvm/test/Transforms/InstCombine/AMDGPU/permlane64.ll [new file with mode: 0644]