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(parent: ec8242c) | patch
ARM: dts: rockchip: rock5b: enable pcie2x1l2 and associated combphy
authorChristopher Obbard <chris.obbard@collabora.com>
Wed, 17 May 2023 10:01:01 +0000 (13:01 +0300)
committerKever Yang <kever.yang@rock-chips.com>
Thu, 18 May 2023 00:44:04 +0000 (08:44 +0800)
commitbfbef68ae1c0386b687e3dbb5043675c501d8714
tree2a08b5da236dcfc91b89ad4a67c7998f47cc138etree | snapshot
parentec8242ccebb839aa16a227efee78f930883181a9commit | diff
ARM: dts: rockchip: rock5b: enable pcie2x1l2 and associated combphy

Enable the PCIe 2x1l 2 device and associated combphy.
On this bus, the Rock5B has an Ethernet transceiver connected.

Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
[eugen.hristev@collabora.com: minor tweaks]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
[jonas@kwiboo.se: add PCIe pins]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi diff | blob | history
Domain: System / Kernel;