perf/x86/intel/cqm: Add storage for 'closid' and clean up 'struct intel_pqr_state'
authorThomas Gleixner <tglx@linutronix.de>
Tue, 19 May 2015 00:00:58 +0000 (00:00 +0000)
committerIngo Molnar <mingo@kernel.org>
Wed, 27 May 2015 07:17:41 +0000 (09:17 +0200)
commitbf926731e1585ccad029ca2fad1444fee082b78d
tree3565ea28fe99cc3b1ef04fab5b9069d4f95f5695
parent43d0c2f6dcd07ffc0de658a7fbeeb63c806e9caa
perf/x86/intel/cqm: Add storage for 'closid' and clean up 'struct intel_pqr_state'

'closid' (CLass Of Service ID) is used for the Class based Cache
Allocation Technology (CAT). Add explicit storage to the per cpu cache
for it, so it can be used later with the CAT support (requires to move
the per cpu data).

While at it:

 - Rename the structure to intel_pqr_state which reflects the actual
   purpose of the struct: cache values which go into the PQR MSR

 - Rename 'cnt' to rmid_usecnt which reflects the actual purpose of
   the counter.

 - Document the structure and the struct members.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Matt Fleming <matt.fleming@intel.com>
Cc: Kanaka Juvva <kanaka.d.juvva@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Vikas Shivappa <vikas.shivappa@linux.intel.com>
Cc: Will Auld <will.auld@intel.com>
Link: http://lkml.kernel.org/r/20150518235150.240899319@linutronix.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/kernel/cpu/perf_event_intel_cqm.c