[AMDGPU] Introduce optimizeCompareInstr
authorStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Tue, 31 Aug 2021 22:10:59 +0000 (15:10 -0700)
committerStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>
Wed, 1 Sep 2021 22:57:05 +0000 (15:57 -0700)
commitbf77b11277411f6725cf09a66feb36d2c14bc8a7
tree906d07e59ef41cbb39479eb5f9824900566625e0
parenta10409fe23c35a7eed0f39d12624af229d3877e1
[AMDGPU] Introduce optimizeCompareInstr

The following patterns are currently handled:

s_cmp_eq_u32 (s_and_b32 $src, 1), 1 => s_and_b32 $src, 1
s_cmp_eq_i32 (s_and_b32 $src, 1), 1 => s_and_b32 $src, 1
s_cmp_eq_u64 (s_and_b64 $src, 1), 1 => s_and_b64 $src, 1
s_cmp_ge_u32 (s_and_b32 $src, 1), 1 => s_and_b32 $src, 1
s_cmp_ge_i32 (s_and_b32 $src, 1), 1 => s_and_b32 $src, 1
s_cmp_lg_u32 (s_and_b32 $src, 1), 0 => s_and_b32 $src, 1
s_cmp_lg_i32 (s_and_b32 $src, 1), 0 => s_and_b32 $src, 1
s_cmp_lg_u64 (s_and_b64 $src, 1), 0 => s_and_b64 $src, 1
s_cmp_gt_u32 (s_and_b32 $src, 1), 0 => s_and_b32 $src, 1
s_cmp_gt_i32 (s_and_b32 $src, 1), 0 => s_and_b32 $src, 1

Differential Revision: https://reviews.llvm.org/D109031
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/lib/Target/AMDGPU/SIInstrInfo.h
llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll
llvm/test/CodeGen/AMDGPU/optimize-compare.mir [new file with mode: 0644]
llvm/test/CodeGen/AMDGPU/select-i1.ll
llvm/test/CodeGen/AMDGPU/trunc.ll
llvm/test/CodeGen/AMDGPU/wave32.ll