powerpc/mm/radix: Update LPCR HR bit as per ISA
authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Wed, 13 Jul 2016 09:35:21 +0000 (15:05 +0530)
committerMichael Ellerman <mpe@ellerman.id.au>
Sun, 17 Jul 2016 06:42:50 +0000 (16:42 +1000)
commitbf16cdf48a5369ba29614a0ade4ae5daf7a9e47c
tree4abc3ff7bb6e15944e9a377bfe4a6064b457a402
parent8cd6d3c23e226ec6cb8825e1aa6a391ebda71c72
powerpc/mm/radix: Update LPCR HR bit as per ISA

PowerISA 3.0 requires the MMU mode (radix vs. hash) of the hypervisor
to be mirrored in the LPCR register, in addition to the partition table.
This is done to avoid fetching from the table when deciding, among other
things, how to perform transitions to HV mode on some interrupts.
So let's set it up appropriately

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/include/asm/reg.h
arch/powerpc/mm/pgtable-radix.c