orcx86: Fix generation of ModR/M / SIB bytes for the EBP, R12, R13 registers

orcx86: Fix generation of ModR/M / SIB bytes for the EBP, R12, R13 registers

See http://wiki.osdev.org/X86-64_Instruction_Encoding#ModR.2FM

ESP and R12 are to be handled exactly the same, that is the addressing is
done with SIB instead of directly.

EBP and R13 have a special case for Mod 00, where they're expecting RIP/EIP
plus 32 bit displacement. If we handle them like all other registers, we would
instead of addressing offset 0, address something relative to the instruction
pointer and make part of the following instruction the 32 bit displacement.

Instead of using Mod 00 for offset 0 like for all other registers, we use Mod
01 and a 8 bit displacement of 0.

On Windows this rather low-level bug caused problems at a rather
high-level in the ORC video conversion code, where a movdqu was eating the
following paddw instruction and tried to load data from a rather random memory
location.

For whatever reason this didn't cause any other big problems in other ORC
generated code, and it also only seemed to have caused problems on Windows.

https://bugzilla.gnome.org/show_bug.cgi?id=765713