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(parent: f655cdd) | patch
Addition to r216371 (SLP and Loop Vectorization) and r218607 where
authorSuyog Sarda <suyog.sarda@samsung.com>
Tue, 11 Nov 2014 07:39:27 +0000 (07:39 +0000)
committerSuyog Sarda <suyog.sarda@samsung.com>
Tue, 11 Nov 2014 07:39:27 +0000 (07:39 +0000)
commitbeb064bd94bcf515305312bbc9a6cf5fde97c4c9
tree7a2c26ce994772ea9495f29930aad1b6ecd4ca63tree | snapshot
parentf655cddb13af0a0698ea8addd76c930776e4874acommit | diff
Addition to r216371 (SLP and Loop Vectorization) and r218607 where
cost model for signed division by power of 2 was improved for AArch64.
The revision r218607 missed test case for Loop Vectorization.
Adding it in this revision.

Differential Revision: http://reviews.llvm.org/D6181

llvm-svn: 221674
llvm/test/Transforms/LoopVectorize/AArch64/sdiv-pow2.ll [new file with mode: 0644] blob
Domain: System / Toolchain;