RISC-V: Fix ICE on riscv_gpr_save_operation_p [PR95683]
authorKito Cheng <kito.cheng@sifive.com>
Tue, 16 Jun 2020 02:14:13 +0000 (10:14 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Tue, 16 Jun 2020 02:14:13 +0000 (10:14 +0800)
commitbeaf12b49ae030505194cdcac18b5c8533a43921
treeada1289469a3559c80cf37a5b7edd9451e749a61
parent6fb94d67f1a3e77462a922341dc75c05e00524d6
RISC-V: Fix ICE on riscv_gpr_save_operation_p [PR95683]

 - riscv_gpr_save_operation_p might try to match parallel on other
   patterns like inline asm pattern, and then it might trigger ther
   assertion checking there, so we could trun it into a early exit check.

gcc/ChangeLog:

PR target/95683
* config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
assertion and turn it into a early exit check.

gcc/testsuite/ChangeLog

PR target/95683
* gcc.target/riscv/pr95683.c: New.
gcc/config/riscv/riscv.c
gcc/testsuite/gcc.target/riscv/pr95683.c [new file with mode: 0644]