i2c: fix bus recovery stop mode timing
authorRussell King <rmk+kernel@armlinux.org.uk>
Sun, 15 Dec 2019 16:39:05 +0000 (16:39 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 14 Jan 2020 19:06:58 +0000 (20:06 +0100)
commitbeab31b2af28f8c5a2580846c886cae530b7a137
tree8f4516104dc36c6cde968d88474a942c6c4bbf41
parentec576895d61356a2cab096e1ca23bf7cc765e5b2
i2c: fix bus recovery stop mode timing

commit cf8ce8b80f8bf9669f6ec4e71e16668430febdac upstream.

The I2C specification states that tsu:sto for standard mode timing must
be at minimum 4us. Pictographically, this is:

SCL: ____/~~~~~~~~~
SDA: _________/~~~~
       ->|    |<- 4us minimum

We are currently waiting 2.5us between asserting SCL and SDA, which is
in violation of the standard. Adjust the timings to ensure that we meet
what is stipulated as the minimum timings to ensure that all devices
correctly interpret the STOP bus transition.

This is more important than trying to generate a square wave with even
duty cycle.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/i2c/i2c-core-base.c