arm64: Add support for trace synchronization barrier
authorSuzuki K Poulose <suzuki.poulose@arm.com>
Mon, 5 Apr 2021 16:42:50 +0000 (17:42 +0100)
committerMathieu Poirier <mathieu.poirier@linaro.org>
Mon, 5 Apr 2021 17:25:06 +0000 (11:25 -0600)
commitbe96826942e8f82acef9902058d1b5e3edb83990
tree946aef65b34e75bf9ee68344dfc1e584a2da3d6a
parent7dde51767ca5339ed33109056d92fdca05d56d8d
arm64: Add support for trace synchronization barrier

tsb csync synchronizes the trace operation of instructions.
The instruction is a nop when FEAT_TRF is not implemented.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210405164307.1720226-4-suzuki.poulose@arm.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
arch/arm64/include/asm/barrier.h