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(parent: 5a4d1fe) | patch
mlxsw: pci: Fix size of trap_id field in CQE
authorJiri Pirko <jiri@mellanox.com>
Tue, 6 Jun 2017 12:12:04 +0000 (14:12 +0200)
committerDavid S. Miller <davem@davemloft.net>
Tue, 6 Jun 2017 16:45:23 +0000 (12:45 -0400)
commitbe8408e1440cbc86683e4e1c65270ad517b4274a
treec18da9da37f5abda6d8e1d5ef52e21fb6a21a16etree | snapshot
parent5a4d1fee2f844813cb2092b7a06b0e20ed9e2fa4commit | diff
mlxsw: pci: Fix size of trap_id field in CQE

The "trap_id" is 9bits long. So far, this was not a problem since we
used only traps with ids that fit into 8bits. But the ACL traps that are
going to be introduced use the 9th bit.

Fixes: eda6500a987a ("mlxsw: Add PCI bus implementation")
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Reviewed-by: Yotam Gigi <yotamg@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/pci_hw.h diff | blob | history
Domain: System / Kernel;