arm64: cpufeature: Fix CTR_EL0 field definitions
authorWill Deacon <will.deacon@arm.com>
Mon, 19 Feb 2018 14:41:44 +0000 (14:41 +0000)
committerCatalin Marinas <catalin.marinas@arm.com>
Mon, 19 Feb 2018 17:02:09 +0000 (17:02 +0000)
commitbe68a8aaf925aaf35574260bf820bb09d2f9e07f
treebcd670f5fffdb0cba127a39926d4d7a1751a9390
parent9085b34d0e8361595a7d19034c550d5d15044556
arm64: cpufeature: Fix CTR_EL0 field definitions

Our field definitions for CTR_EL0 suffer from a number of problems:

  - The IDC and DIC fields are missing, which causes us to enable CTR
    trapping on CPUs with either of these returning non-zero values.

  - The ERG is FTR_LOWER_SAFE, whereas it should be treated like CWG as
    FTR_HIGHER_SAFE so that applications can use it to avoid false sharing.

  - [nit] A RES1 field is described as "RAO"

This patch updates the CTR_EL0 field definitions to fix these issues.

Cc: <stable@vger.kernel.org>
Cc: Shanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/kernel/cpufeature.c