arm64: kernel: fix architected PMU registers unconditional access
authorLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Wed, 13 Jan 2016 14:50:03 +0000 (14:50 +0000)
committerSasha Levin <sasha.levin@oracle.com>
Mon, 15 Feb 2016 20:45:22 +0000 (15:45 -0500)
commitbe630626eccf643f4c2c7e276e1f25b9928ec2e4
tree557cf8a0dcc7a02360e34a621a06f14ea34a8f1b
parent5ebf917025ec0d6f62f7d8411744d16efe9745d0
arm64: kernel: fix architected PMU registers unconditional access

[ Upstream commit f436b2ac90a095746beb6729b8ee8ed87c9eaede ]

The Performance Monitors extension is an optional feature of the
AArch64 architecture, therefore, in order to access Performance
Monitors registers safely, the kernel should detect the architected
PMU unit presence through the ID_AA64DFR0_EL1 register PMUVer field
before accessing them.

This patch implements a guard by reading the ID_AA64DFR0_EL1 register
PMUVer field to detect the architected PMU presence and prevent accessing
PMU system registers if the Performance Monitors extension is not
implemented in the core.

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: <stable@vger.kernel.org>
Fixes: 60792ad349f3 ("arm64: kernel: enforce pmuserenr_el0 initialization and restore")
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reported-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Sasha Levin <sasha.levin@oracle.com>
arch/arm64/kernel/head.S
arch/arm64/mm/proc-macros.S
arch/arm64/mm/proc.S