intel/genxml: Drop Tiled Resource Mode fields

intel/genxml: Drop Tiled Resource Mode fields

Neither RENDER_SURFACE_STATE nor VDENC_SURFACE_CONTROL_BITS have a
Tiled Resource Mode field anymore.  The RENDER_SURFACE_STATE field
was also overlapping with the L1 Cache Control settings field.

This also drops the assignment of that field in isl, because we were
just explicitly setting it to NONE (0) which is already the default
value genxml packing will give us.  That saves us some ifdefs.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23449>