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(parent: 12fc8ef) | patch
mmc: stm32_sdmmc2: add dual data rate support
authorYann Gautier <yann.gautier@foss.st.com>
Tue, 13 Sep 2022 11:23:44 +0000 (13:23 +0200)
committerJaehoon Chung <jh80.chung@samsung.com>
Mon, 24 Oct 2022 09:01:59 +0000 (18:01 +0900)
commitbe1872982e425375a7da6ac75da946f9d15df405
tree9e59c53825a634b7e721265f7464613f2d590cd2tree | snapshot
parent12fc8efe5ad3d57ee82e0a4c548f5c47f473a9b4commit | diff
mmc: stm32_sdmmc2: add dual data rate support

To support dual data rate with STM32 sdmmc2 driver, the dedicated bit
(DDR - BIT(18)) needs to be set in the CLKRC register. Clock bypass
(no divider) is not allowed in this case. This is required for the
eMMC DDR modes.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
drivers/mmc/stm32_sdmmc2.c diff | blob | history
Domain: System / Kernel;