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phy: qcom-qmp: Add support for SDX55 QMP PCIe PHY
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tue, 27 Apr 2021 06:54:00 +0000 (12:24 +0530)
committerVinod Koul <vkoul@kernel.org>
Mon, 31 May 2021 07:09:39 +0000 (12:39 +0530)
commitbe0ddb5dfd8b6f3f32e493d34f3819182f354d5e
treea9b88fc14a82256825d59877ab49579769fb9d0ftree | snapshot
parent952b702bf82f999853a2db5a592a692274f5554ecommit | diff
phy: qcom-qmp: Add support for SDX55 QMP PCIe PHY

The PCIe PHY version used in SDX55 is v4.20 which has different register
offsets compared to the v4.0x PHYs. So separate register defines are
used for init sequence and PHY status.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210427065400.18958-4-manivannan.sadhasivam@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp.c diff | blob | history
drivers/phy/qualcomm/phy-qcom-qmp.h diff | blob | history
Domain: System / Kernel;