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(parent: 6567650) | patch
ARM: dts: socfpga: fix register entry for timer3 on Arria10
authorDinh Nguyen <dinguyen@kernel.org>
Fri, 31 Jul 2020 15:26:40 +0000 (10:26 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 23 Sep 2020 06:46:08 +0000 (08:46 +0200)
commitbd433df280144b2a32fac81f39254eebdc38afa5
tree2168c7dedff8938ba34e3880dfc2d73294a33ff0tree | snapshot
parent65676505f8fbee350e75a9d4b933d2857cb17c4dcommit | diff
ARM: dts: socfpga: fix register entry for timer3 on Arria10

[ Upstream commit 0ff5a4812be4ebd4782bbb555d369636eea164f7 ]

Fixes the register address for the timer3 entry on Arria10.

Fixes: 475dc86d08de4 ("arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC")
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm/boot/dts/socfpga_arria10.dtsi diff | blob | history
Domain: System / Kernel;