octeontx2-af: Fix mapping for NIX block from CGX connection
authorHariprasad Kelam <hkelam@marvell.com>
Fri, 30 Jun 2023 06:28:43 +0000 (11:58 +0530)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 19 Jul 2023 14:22:04 +0000 (16:22 +0200)
commitbd246c92d2d53a37e930206a096be23f46532500
treebcfce2cc1095564e51bc2a9aca5abaaac5766de5
parentc2c5c6d2c474eb771b35322d8eeac0905efd14ff
octeontx2-af: Fix mapping for NIX block from CGX connection

[ Upstream commit 2e7bc57b976bb016c6569a54d95c1b8d88f9450a ]

Firmware configures NIX block mapping for all MAC blocks.
The current implementation reads the configuration and
creates the mapping between RVU PF  and NIX blocks. But
this configuration is only valid for silicons that support
multiple blocks. For all other silicons, all MAC blocks
map to NIX0.

This patch corrects the mapping by adding a check for the same.

Fixes: c5a73b632b90 ("octeontx2-af: Map NIX block from CGX connection")
Signed-off-by: Hariprasad Kelam <hkelam@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c