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(parent: 6d9b0b5) | patch
powerpc: Avoid misaligned stores in memset
authorRajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
Tue, 19 Sep 2017 08:25:49 +0000 (13:55 +0530)
committerRajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
Tue, 19 Sep 2017 08:25:49 +0000 (13:55 +0530)
commitbd17ba29eb5cb4ec7251c1ed0b4dcd7d287c0c0c
tree7be77d387aac0fb4d0140211fadf6002c8b6f9e7tree | snapshot
parent6d9b0b5a22738e100b57bdd593d799abac4949d7commit | diff
powerpc: Avoid misaligned stores in memset

As per the section "3.1.4.2 Alignment Interrupts" of the "POWER8 Processor
User's Manual for the Single-Chip Module", alignment interrupt is reported
for misaligned stores in  Caching-inhibited storage.  As memset is used in
some drivers for DMA (like xorg), this patch avoids misaligned stores for
sizes less than 8 in memset.
ChangeLog diff | blob | history
sysdeps/powerpc/powerpc64/power8/memset.S diff | blob | history
Domain: System / Toolchain;