v3dv/pipeline: use pipeline depth bias enabled to fill up CFG packet
authorAlejandro Piñeiro <apinheiro@igalia.com>
Sat, 1 Apr 2023 22:19:32 +0000 (00:19 +0200)
committerMarge Bot <emma+marge@anholt.net>
Tue, 4 Apr 2023 00:06:38 +0000 (00:06 +0000)
commitbbd124fd005e8b66311b426a61a640546d7e4cbb
treed24929a250b77ab9074bdb9b6b4c6245da2744bd
parenta88aedbfa5b620be844c0f5615d484c970ea66ac
v3dv/pipeline: use pipeline depth bias enabled to fill up CFG packet

Even if the VkPipelineRasterizationStateCreateInfo sets
depthBiasEnable, internally we comput if it is really makes sense, and
use that to decide for example if we emit the Depth Offset packet.

But we were not using this to enable Depth Bias through the depth
offset enable field on the CFG packet.

So in some tests we were enabling depth bias, but not emitting the
packet to configure it, that seemed somewhat inconsistent.

This didn't cause any issue so far, but let's be conservative.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22252>
src/broadcom/vulkan/v3dv_pipeline.c
src/broadcom/vulkan/v3dvx_pipeline.c