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(parent: f6bbec3) | patch
pinctrl: uniphier: support 4bit-width pin-mux register capability
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Fri, 16 Sep 2016 18:32:58 +0000 (03:32 +0900)
committerMasahiro Yamada <yamada.masahiro@socionext.com>
Sun, 18 Sep 2016 14:10:11 +0000 (23:10 +0900)
commitbbb119800f5ce8a291d707fd1a8e753959a93fd1
tree1dbbd803c23aa81aa1d9214e0d20730bcab04e80tree | snapshot
parentf6bbec3d5c12457e2ce207f662e65e7da70254cecommit | diff
pinctrl: uniphier: support 4bit-width pin-mux register capability

On LD4 SoC or later, the pin-mux registers are 8bit wide, while 4bit
wide on sLD3 SoC.  Support it for the sLD3 pinctrl driver.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
drivers/pinctrl/uniphier/pinctrl-uniphier-core.c diff | blob | history
drivers/pinctrl/uniphier/pinctrl-uniphier.h diff | blob | history
Domain: System / Kernel;