[MCA] Support carry-over instructions for in-order processors
authorAndrew Savonichev <andrew.savonichev@gmail.com>
Wed, 24 Mar 2021 20:33:21 +0000 (23:33 +0300)
committerAndrew Savonichev <andrew.savonichev@gmail.com>
Thu, 25 Mar 2021 21:06:19 +0000 (00:06 +0300)
commitbba25a9cd827f9ee822616cc194206ffb7c0a49b
treec544d80fa8eacd1b0933804e29c9a2e7b91fc5e8
parentf490a5969bd52c8a48586f134ff8f02ccbb295b3
[MCA] Support carry-over instructions for in-order processors

Instructions that have more uops than the processor's IssueWidth are
issued in multiple cycles.

The patch fixes PR49712.

Differential Revision: https://reviews.llvm.org/D99339
llvm/include/llvm/MCA/Stages/InOrderIssueStage.h
llvm/lib/MCA/Stages/InOrderIssueStage.cpp
llvm/test/tools/llvm-mca/AArch64/Cortex/A53-carry-over.s [new file with mode: 0644]
llvm/test/tools/llvm-mca/AMDGPU/gfx10-double.s