AMDGPU: Fix not respecting byval alignment in call frame setup
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 22 Aug 2018 11:09:45 +0000 (11:09 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 22 Aug 2018 11:09:45 +0000 (11:09 +0000)
commitbb8e64e7f5ad448bf04ba84c995b8a7cbf9bb7e4
tree8f681d00dc1625318f78bf0da76e8b874cf76577
parent4660fd25d1f7524d89ed2374daaa1bceb707b808
AMDGPU: Fix not respecting byval alignment in call frame setup

This was hackily adding in the 4-bytes reserved for the callee's
emergency stack slot. Treat it like a normal stack allocation
so we get the correct alignment padding behavior. This fixes
an inconsistency between the caller and callee.

llvm-svn: 340396
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/lib/Target/AMDGPU/SIISelLowering.h
llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll
llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll