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(parent: 9e8e8c6) | patch
AMDGPU/GlobalISel: Handle more input argument intrinsics
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 1 Jul 2019 18:50:50 +0000 (18:50 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 1 Jul 2019 18:50:50 +0000 (18:50 +0000)
commitbae3636f9692a56cbb2d75271766a4d7eca4e8c3
treecc26cf6cf3aae3eb3c70ce59585394df3127485btree | snapshot
parent9e8e8c60fa1060f6f5fd0ffd367c06b14fee52a3commit | diff
AMDGPU/GlobalISel: Handle more input argument intrinsics

llvm-svn: 364836
llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp diff | blob | history
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_ps.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.id.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.ptr.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.implicit.buffer.ptr.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.queue.ptr.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicit.buffer.ptr.ll diff | blob | history
Domain: System / Toolchain;