MIPS: fix case mismatch in local_r4k_flush_icache_range()
authorHuacai Chen <chenhc@lemote.com>
Wed, 15 Jan 2014 01:56:37 +0000 (17:56 -0800)
committerLinus Torvalds <torvalds@linux-foundation.org>
Wed, 15 Jan 2014 07:19:42 +0000 (14:19 +0700)
commitbad009fe354a00e6b2bf87328995ec76e59ab970
tree842f0a9b39820d7e0d2ea5a0a462bbaa4a916826
parent70f2fe3a26248724d8a5019681a869abdaf3e89a
MIPS: fix case mismatch in local_r4k_flush_icache_range()

Currently, Loongson-2 call protected_blast_icache_range() and others
call protected_loongson23_blast_icache_range(), but I think the correct
behavior should be the opposite.  BTW, Loongson-3's cache-ops is
compatible with MIPS64, but not compatible with Loongson-2.  So, rename
xxx_loongson23_yyy things to xxx_loongson2_yyy.

The patch fixes early boot hang with 3.13-rc1, introduced in commit
14bd8c082016 ("MIPS: Loongson: Get rid of Loongson 2 #ifdefery all over
arch/mips").

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
arch/mips/include/asm/cacheops.h
arch/mips/include/asm/r4kcache.h
arch/mips/mm/c-r4k.c