[X86][Costmodel] Load/store i8 Stride=2 VF=16 interleaving costs
authorRoman Lebedev <lebedev.ri@gmail.com>
Wed, 29 Sep 2021 18:42:01 +0000 (21:42 +0300)
committerRoman Lebedev <lebedev.ri@gmail.com>
Wed, 29 Sep 2021 18:52:45 +0000 (21:52 +0300)
commitbac60c55e0ff88f0f61ffed330374699216e1329
tree794cdbdb4ebac1cbdb6d45e1a92e4ea2b3522546
parent19621856712155a5bdffd3168e6cb36b84c78fa8
[X86][Costmodel] Load/store i8 Stride=2 VF=16 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/a9hv4z47v - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: =2.0`
So pick cost of `4`.

For store we have:
https://godbolt.org/z/6GfPn1b79 - for intels `Block RThroughput: =3.0`; for ryzens, `Block RThroughput: <=2.0`
So pick cost of `3`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110708
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-2.ll