i965/gen7: Handle atomic instructions from the VEC4 back-end.
authorFrancisco Jerez <currojerez@riseup.net>
Wed, 25 Sep 2013 23:31:35 +0000 (16:31 -0700)
committerFrancisco Jerez <currojerez@riseup.net>
Mon, 4 Nov 2013 20:12:38 +0000 (12:12 -0800)
commitba885c30c74f9efc94743d4582d30a0e70924b97
treec1fbbdb4f55d1de6d5e24dc74232382f5b635aca
parent764f40d92edfdfea4ea2b092fd1ba7888cc7ea7e
i965/gen7: Handle atomic instructions from the VEC4 back-end.

This can deal with all the 15 32-bit untyped atomic operations the
hardware supports, but only INC and PREDEC are going to be exposed
through the API for now.

v2: Represent atomics as GLSL intrinsics.  Add support for variably
    indexed atomic counter arrays.
v3: Add comment on why we don't need to assign uniform storage for
    atomic counters.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
src/mesa/drivers/dri/i965/brw_vec4.h
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp