[PowerPC] Generate inlined quadword lock free atomic operations via AtomicExpand
authorKai Luo <lkail@cn.ibm.com>
Thu, 15 Jul 2021 00:49:42 +0000 (00:49 +0000)
committerKai Luo <lkail@cn.ibm.com>
Thu, 15 Jul 2021 01:12:09 +0000 (01:12 +0000)
commitb9c3941cd61de1e1b9e4f3311ddfa92394475f4b
tree6f0577d7a6e4c8f3ebd81167944ab409ca965b40
parentde79ba9f9a2de3d86fa3f44b57e147844b6f2625
[PowerPC] Generate inlined quadword lock free atomic operations via AtomicExpand

This patch uses AtomicExpandPass to implement quadword lock free atomic operations. It adopts the method introduced in https://reviews.llvm.org/D47882, which expand atomic operations post RA to avoid spilling that might prevent LL/SC progress.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D103614
14 files changed:
llvm/include/llvm/IR/IntrinsicsPowerPC.td
llvm/lib/CodeGen/AtomicExpandPass.cpp
llvm/lib/Target/PowerPC/CMakeLists.txt
llvm/lib/Target/PowerPC/PPC.h
llvm/lib/Target/PowerPC/PPC.td
llvm/lib/Target/PowerPC/PPCExpandAtomicPseudoInsts.cpp [new file with mode: 0644]
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.h
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/lib/Target/PowerPC/PPCSubtarget.h
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
llvm/test/CodeGen/PowerPC/O3-pipeline.ll
llvm/test/CodeGen/PowerPC/atomics-i128.ll [new file with mode: 0644]