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(parent: 5057f14) | patch
i965/gen11: Fix must-be-ones bit positions in 3D_MODE
authorJordan Justen <jordan.l.justen@intel.com>
Wed, 10 Mar 2021 17:26:13 +0000 (09:26 -0800)
committerMarge Bot <eric+marge@anholt.net>
Fri, 19 Mar 2021 09:07:37 +0000 (09:07 +0000)
commitb9a7f9314bc1acb64b778f8d9405e0a0e74a6ff2
tree8a22226ab3837303004aa6217b696c1826db422dtree | snapshot
parent5057f14cbaa4810995c959a96f1e7047a781ff38commit | diff
i965/gen11: Fix must-be-ones bit positions in 3D_MODE

Fixes: f0d29238df3 ("i965/gen11: Emit SLICE_HASH_TABLE when pipes are unbalanced.")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9505>
src/mesa/drivers/dri/i965/brw_state_upload.c diff | blob | history
Domain: Graphics System / GL;