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(parent: 15d058f) | patch
[ARM] VBIT/VBIF support added.
authorPavel Iliin <Pavel.Iliin@arm.com>
Tue, 14 Jul 2020 18:36:56 +0000 (19:36 +0100)
committerPavel Iliin <Pavel.Iliin@arm.com>
Thu, 16 Jul 2020 10:25:53 +0000 (11:25 +0100)
commitb9a6fb64281b6836e565ee39fb0d543bf184fd88
tree0035b80cb885dc5512b0a988d64967e6dde151f9tree | snapshot
parent15d058f16ec3a103587d589a8ccbbb7375feae7acommit | diff
[ARM] VBIT/VBIF support added.

Vector bitwise selects are matched by pseudo VBSP instruction
and expanded to VBSL/VBIT/VBIF after register allocation
depend on operands registers to minimize extra copies.
19 files changed:
llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp diff | blob | history
llvm/lib/Target/ARM/ARMISelLowering.cpp diff | blob | history
llvm/lib/Target/ARM/ARMISelLowering.h diff | blob | history
llvm/lib/Target/ARM/ARMInstrNEON.td diff | blob | history
llvm/lib/Target/ARM/ARMScheduleA57.td diff | blob | history
llvm/lib/Target/ARM/ARMScheduleR52.td diff | blob | history
llvm/lib/Target/ARM/ARMScheduleSwift.td diff | blob | history
llvm/test/CodeGen/ARM/fcopysign.ll diff | blob | history
llvm/test/CodeGen/ARM/fp16-promote.ll diff | blob | history
llvm/test/CodeGen/ARM/vbsl-constant.ll diff | blob | history
llvm/test/CodeGen/ARM/vbsl.ll diff | blob | history
llvm/test/CodeGen/ARM/vselect_imax.ll diff | blob | history
llvm/test/CodeGen/Thumb2/float-intrinsics-double.ll diff | blob | history
llvm/test/CodeGen/Thumb2/float-intrinsics-float.ll diff | blob | history
llvm/test/MC/ARM/neon-bitwise-encoding.s diff | blob | history
llvm/test/MC/ARM/neont2-bitwise-encoding.s diff | blob | history
llvm/test/MC/Disassembler/ARM/neon-tests.txt diff | blob | history
llvm/test/MC/Disassembler/ARM/neon.txt diff | blob | history
llvm/test/MC/Disassembler/ARM/neont2.txt diff | blob | history
Domain: System / Toolchain;