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(parent: c38b3f0) | patch
[X86][BtVer2] Fix WriteFShuffle256 schedule write info.
authorAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Fri, 31 Aug 2018 08:30:47 +0000 (08:30 +0000)
committerAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Fri, 31 Aug 2018 08:30:47 +0000 (08:30 +0000)
commitb998eae2f2327b6df9ea71e8fb475b84cc657b57
tree3470520ada860af4639e9c43eac5cf8e45542ad7tree | snapshot
parentc38b3f03084c2c664947217c4441d335a31e4d9acommit | diff
[X86][BtVer2] Fix WriteFShuffle256 schedule write info.

This patch fixes the number of micro opcodes, and processor resource cycles for
the following AVX instructions:

vinsertf128rr/rm
vperm2f128rr/rm
vbroadcastf128

Tests have been regenerated using the usual scripts in the llvm/utils directory.

Differential Revision: https://reviews.llvm.org/D51492

llvm-svn: 341185
llvm/lib/Target/X86/X86ScheduleBtVer2.td diff | blob | history
llvm/test/CodeGen/X86/avx-schedule.ll diff | blob | history
llvm/test/tools/llvm-mca/X86/BtVer2/resources-avx1.s diff | blob | history
Domain: System / Toolchain;