MIPS: Octeon: Rewrite DMA mapping functions.
authorDavid Daney <ddaney@caviumnetworks.com>
Fri, 1 Oct 2010 20:27:34 +0000 (13:27 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 29 Oct 2010 18:08:32 +0000 (19:08 +0100)
commitb93b2abce497873be97d765b848e0a955d29f200
tree0372a9162b8bbf67f5a5f7367a1da2001ea0292c
parentee71b7d2f834d5e4b3a43001b2fa88743ed71a2c
MIPS: Octeon: Rewrite DMA mapping functions.

All Octeon chips can support more than 4GB of RAM.  Also due to how Octeon
PCI is setup, even some configurations with less than 4GB of RAM will have
portions that are not accessible from 32-bit devices.

Enable the swiotlb code to handle the cases where a device cannot directly
do DMA.  This is a complete rewrite of the Octeon DMA mapping code.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1639/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/cavium-octeon/Kconfig
arch/mips/cavium-octeon/dma-octeon.c
arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
arch/mips/include/asm/octeon/pci-octeon.h
arch/mips/pci/pci-octeon.c
arch/mips/pci/pcie-octeon.c