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RISC-V: KVM: Factor-out instruction emulation into separate sources
authorAnup Patel <apatel@ventanamicro.com>
Fri, 29 Jul 2022 11:44:40 +0000 (17:14 +0530)
committerAnup Patel <anup@brainfault.org>
Fri, 29 Jul 2022 11:44:40 +0000 (17:14 +0530)
commitb91f0e4cb8a3ce4f2716a13739ade0f7bea8eadb
tree29fab87cac1769e2683db465f6ac620118e31652tree | snapshot
parentfe283e5fa1edc59f37265c91dc79bf119a5ccc79commit | diff
RISC-V: KVM: Factor-out instruction emulation into separate sources

The instruction and CSR emulation for VCPU is going to grow over time
due to upcoming AIA, PMU, Nested and other virtualization features.

Let us factor-out VCPU instruction emulation from vcpu_exit.c to a
separate source dedicated for this purpose.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/include/asm/kvm_host.h diff | blob | history
arch/riscv/include/asm/kvm_vcpu_insn.h [new file with mode: 0644] blob
arch/riscv/kvm/Makefile diff | blob | history
arch/riscv/kvm/vcpu_exit.c diff | blob | history
arch/riscv/kvm/vcpu_insn.c [new file with mode: 0644] blob
Domain: System / Kernel;