PM / OPP: Add new bindings to address shortcomings of existing bindings
authorViresh Kumar <viresh.kumar@linaro.org>
Thu, 4 Jun 2015 16:20:31 +0000 (21:50 +0530)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Mon, 22 Jun 2015 12:20:02 +0000 (14:20 +0200)
commitb901b518077ba87bc84c84de02fce186cf9e5856
treeceeaa0a2d00bf5d9e8a968a08deb4babda6c7aa9
parent0f57d86787d8b1076ea8f9cbdddda2a46d534a27
PM / OPP: Add new bindings to address shortcomings of existing bindings

Current OPP (Operating performance point) device tree bindings have been
insufficient due to the inflexible nature of the original bindings. Over
time, we have realized that Operating Performance Point definitions and
usage is varied depending on the SoC and a "single size (just frequency,
voltage) fits all" model which the original bindings attempted and
failed.

The proposed next generation of the bindings addresses by providing a
expandable binding for OPPs and introduces the following common
shortcomings seen with the original bindings:

- Getting clock/voltage/current rails sharing information between CPUs.
  Shared by all cores vs independent clock per core vs shared clock per
  cluster.

- Support for specifying current levels along with voltages.

- Support for multiple regulators.

- Support for turbo modes.

- Other per OPP settings: transition latencies, disabled status, etc.?

- Expandability of OPPs in future.

This patch introduces new bindings "operating-points-v2" to get these problems
solved. Refer to the bindings for more details.

We now have multiple versions of OPP binding and only one of them should
be used per device.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Documentation/devicetree/bindings/power/opp.txt